1. Field
The present invention generally relates to a semiconductor device and a method for transferring data.
2. Background
Several types of mechanisms for writing flash memory are conventionally available. For example, in n-channel floating-gate flash memory, data is written by accumulating, on the floating gate, channel hot electrons generated by causing a current to flow between the drain and the source.
In p-channel floating-gate flash memory, data is written by band-to-band tunneling, and so the current flowing through each cell during a write is very small, (e.g., 10 nA per bit.) The current flowing through each cell is hereafter also referred to as “cell current.”
FIG. 1 is a diagram showing an example of the schematic structure of the p-channel floating-gate flash memory. For example, in the case where 1024 bits of memory cells are connected to one word line, the total cell current to write the memory cells corresponding to one word line at once is a mere 10 ρA. An internal boost power supply included in the flash memory is enough to supply 10 μA. Each SSEL shown in FIG. 1 is a transistor for selecting a local bit line (LBL).
Thus, the p-channel floating-gate flash memory enables a large amount of data to be written faster, by batch writing of multiple bits through use of the above-mentioned feature (for example, WO2006/038250, JP2003-85989 A). There is also a semiconductor integrated circuit that increases the reading speed for a hierarchized bit line structure in an on-chip nonvolatile memory (for example, JP2004-318941 A).